The present invention relates generally to frequency modulation of a RF carrier signal and more particularly to frequency modulation of a synthesized RF carrier signal generated by a phase-locked loop utilizing digital techniques.
Signal generators utilizing phase-locked loop (PLL) apparatus to provide an output signal having a precise stable frequency are well known in the art. Such a PLL typically includes a tunable oscillator, such as a voltage controlled oscillator (VCO), whose output frequency is locked to the frequency of a known reference signal by means of a phase comparator. The phase comparator generates an output voltage or current that is proportional to the phase difference between the VCO output signal and the reference signal. The phase comparator output is fed back to the input of the VCO to tune the VCO to a desired frequency and eliminate any phase difference at the phase comparator. This forces the VCO output signal to have the same frequency as the reference signal. By interposing a divide-by-N block in the PLL circuit, the reference frequency may instead be compared with the VCO output frequency divided by N; the VCO output will then be locked to N times the reference frequency. Another technique, called fractional-N, makes it possible to synthesize frequencies that are any rational multiple of the reference frequency. Such a technique is disclosed in U.S. Pat. No. 3,928,813 issued to Charles A. Kingsford-Smith on Dec. 23, 1975 entitled "Device for Synthesizing Frequencies Which are Rational Multiples of a Fundamental Frequency".
In a given application, it is often desired to frequency modulate (FM) such a synthesized signal. A PLL is, in effect, a control system that maintains a constant phase difference between two signals. Any variations in the phase of one signal relative to the other signal are removed by the PLL. This property of a PLL is utilized to suppress noise and clean up the output signal; however, this property of the PLL also tends to suppress any attempts to frequency modulate the output signal.
Audio or low rate FM may be accomplished by splitting the FM signal into two separate signal paths. One path is AC coupled to the input of the VCO and is the primary path for the FM signal for frequency deviation outside the bandwidth of the PLL. For frequency deviation, inside the PLL bandwidth the FM signal is integrated and summed with the output of the phase detector or phase comparator at a loop summing node. Since phase is the integral of frequency, FM at frequencies within the PLL bandwidth is accomplished by phase modulation (PM). In order to prevent the PLL from correcting the frequency shift of the VCO output signal, a pulse has to be added or subtracted from the VCO output signal for each two pi radians of phase accumulation due to the deviation from the center frequency. Properly scaling the gains of each signal path provides flat FM response both inside and outside the PLL bandwidth. Such a technique is disclosed in U.S. Pat. No. 4,546,331 issued to DaSilva et al on Oct. 8, 1985 entitled "Frequency Modulation in a Phase-Locked Loop." The described technique is often employed to accomplish FM in PLL's; however, it has some important limitations.
There are two characteristics which inherently limit the amount of frequency deviation from the center frequency that is obtainable in a PLL. First, phase detectors or phase comparators typically operate linearly over only a range of a few degrees or a small fraction of a radian. This forces the maximum obtainable frequency deviation to be small at low modulation rates. Secondly, an integrator generally comprises an operational amplifier with a capacitor in its feedback path. Practical integrators cannot provide an output that is higher than the power supply voltage, typically plus or minus 10 to plus or minus 15 volts. This determines the maximum PM signal, further restricting the maximum FM deviation obtainable.
A typical application requires a RF signal to be frequency modulated at audio rates and at high carrier frequency deviations. This application requires a large modulation index, where the modulation index is the ratio of the maximum frequency shift in the VCO output to the modulation rate. Usually a large modulation index is obtained by constructing a PLL having a narrow bandwidth thus allowing most of the FM to be accomplished outside the loop bandwidth. The limitation of a narrow bandwidth loop is that the stability provided by a wide bandwidth PLL is lost. Further, narrow bandwidth loops are inherently noisier and more susceptible to spurs and jitter caused by external sources, such as vibration than are wide bandwidth loops.